This invention relates to a memory address producing device for use in supplying an address signal to a memory which is for putting a sound processing device in operation of, typically, generating a three-dimensional image of an acoustic field in, for example, a theater.
For use in generating such a three-dimensional image, the memory is used in memorizing samples of a digital sound signal and in supplying the sound processing device in a current sampling interval with one of the samples that is sampled from the digital sound signal at a prior sampling interval which is a selected delay interval prior to the current sampling interval. The selected delay interval is selected from various delay intervals. Each delay interval is represented by a delay count representative of the number of samples sampled between the prior and the current sampling intervals.
In the manner which will later be described more in detail, a conventional memory address producing device comprises a counter for counting clock pulses to provide a clock count and to produce a count signal representative of the clock count. A group or bank of registers is used to memorize the delay counts and to produce one of the delay counts as a selected delay count in response to a control signal. Connected to the counter and coupled to the register group, a substracter subtracts the selected delay count from the clock count to provide a difference count and to produce a difference signal which represents the difference count and is used as the address signal in making the memory produce the sample sampled in the prior sampling interval.
The sound processing device comprises a plurality of basic processing units which comprise delay circuits, each for giving the selected delay to an input sound supplied thereto. In this manner, the delay circuits are used in connection with various delay counts corresponding to the various delay intervals. When the samples are sampled at a sampling frequency of 40 kHz, the selected delay count varies between a minimum count of forty and a maximum count of two hundred thousand. The memory has a memory space which is divided into a plurality of memory divisions, equal in number to the delay circuits. When used in combination with the conventional memory address producing device, each memory division must comprise memory addresses of a common number which is sufficient to cover the maximum count. The memory space is therefore used in waste. In other words, the memory space is ineffectively used.